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Linghua PCI-7300A 80MB/s ultra high speed 32 channel digital I/O card
Linghua PCI-7300A 80MB/s ultra high speed 32 channel digital I/O card
Product details
PCI-7300A
80MB/s ultra high speed32 channel digital quantityI/Oblock
80MB/s ultra high speed32 channel digital quantityI/Oblock
characteristic
| 32 BitPCI bus, plug and play | |
| multipleI/O port configuration, including16 DI and16 DO32 DI or32 DO | |
| highest80MB/s data transmission rate | |
| useBus master control data transmission using scatter runner technology | |
| The built-in timer on the board triggers | |
| Two built-in on the board16k word sizeFIFO is used for digital input/Output channel | |
| Multiple configurations of digital waveform generators | |
| Provide a handshake method for data transmissionACK andREQ signal | |
| Multiple interrupt sources programmable options | |
| Compact half length card structure | |
| 100 pin SCSI-II connector |
overview
PCI-7300A isPCI architecture, ultra high speed digital quantityI/O card. It includes32 digit inputs and/Or output channel. The high-performance design and modern technology make this card a high-speed digital input/Ideal choice for output applications.
Maximum data collection frequency
The maximum data transfer rate between the peripheral and the built-in FIFO on the board can reach 80MB/s (digital output) or 160MB/s (digital input). The result of 80MB/s is obtained by multiplying the 32-bit bus bandwidth by the clock within 20MHz. The result of 160MB/s is obtained by multiplying the 32-bit bus bandwidth by a 40MHz external clock, but this only applies to digital input channels. When the length of the collected data does not exceed the FIFO size (16K points), the PCI-7300A can achieve such high speed.
Bus MasteringDMA
The PCI-7300A uses bus master DMA and Scatter Gate to perform high-speed data transfer between the built-in FIFO on the board and the host memory through a 32-bit PCI bus. The PCI bus can provide a maximum data flow of 132MB/s (burst mode) and offers DMA mode without the need for processor intervention. When PCI-7300A becomes the bus master device, it will take control of the PCI bus, transmit data at burst speed, and then release the bus for use by other peripheral devices. When the data collection bandwidth is lower than the continuous bandwidth of the PCI bus, users can use unlimited main memory to save data.
supportScatter Gather
For bus master devices, hardware supports data transfer between continuous physical memory. PCI-7300A contains multiple address and length register pairs, each of which corresponds to a contiguous buffer segment. This enables PCI-7300A to distribute the entire DMA address space to different buffers. These address and quantity registers are usually considered as a scatter/runner list, and you can also assume that these bus master devices have their own built-in mapping registers.
I/O port configuration
PCI-7300AIt is configured as two ports: PORTA and PORTB. Each port can control 16 digital I/O lines. They can all be configured as inputs or outputs. According to the external device environment, users can configure PCI-7300A for high-speed digital I/O data transmission. PCI-7300A can support multiple different digital I/O operation modes:
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Internal clock: The data input and output operations are controlled by an internal clock, and data is transmitted through the bus master DMA mode. |
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External trigger: The input and output operations of T digital quantity are input from external sources/Output gating signal（DIREQ or DO-ACK）Control, data is transmitted through bus master DMA mode. |
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Handshake method: Through REQ input signal and ACK output signal, digital I/O data can be transmitted in a simple handshake manner. |
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Curve occurrence: Read or write data at a predetermined speed. Users can use the onboard counter（50ns resolution) to control this speed. |
specifications
Numerical quantityI/O（DIO）
| Number of channels:32 | |||||||||
| Device:IDT 74FCT373 | |||||||||
I/O configuration:
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I/O signal characteristics:
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| Data transmission: SupportsScatter/Gather Bus MasterDMA | |||||||||
| Data transmission bus width:32/16/8-bit (programmable) | |||||||||
Maximum transmission speed:
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Auxiliary digital quantityI/O
| Number of channels:4 DI, 4 DO | |
| TTL compatible | |
| Data transmission mode:PIO |
Programmable counter
| Device:82C54-10 | |
| Digital input clock:20MHz, 10MHz or timerOutput of 0 | |
| Digital output clock:20MHz, 10MHz or timerOutput of 1 | |
| Universal Timer: or TimerOutput of 2 |
general characteristics
| Connector:100-pin SCSI-II | |
| Operating temperature:0° ~ 60°C | |
| Storage temperature:-20° ~ 80°C | |
| Humidity:5-90%, no condensation | |
| Power consumption:+5V @ 830mA (maximum) | |
| Size:179 mm x 102 mm |
Terminal board
| DIN-100S | |
| DIN-502S |
Ordering Guide
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PCI-7300A
80MB/S ultra high speed digital quantityI/O card |
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PCI-7300A/D
PCI-7300A and additionalDIN-100S |
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